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(R)
74VHCT00A
QUAD 2-INPUT NAND GATE
PRELIMINARY DATA
s s
s
s
s
s
s
s
s s
HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 A (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 00 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (Max.)
M (Micro Package)
T (TSSOP Package)
ORDER CODES : 74VHCT00AM 74VHCT00AT The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
DESCRIPTION The 74VHCT00A is an advanced high-speed CMOS QUAD 2-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 1999
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74VHCT00A
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 14 SYMBOL 1A to 4A 1B to 4B 1Y to 4Y GND VCC NAME AND FUNCT ION Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage
TRUTH TABLE
A L L H H B L H L H Y H H H L
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage (see note 1) DC Output Voltage (see note 2) DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 20 25 50 -65 to +150 300 Unit V V V V mA mA mA mA
o o
ICC or IGND DC VCC or Ground Current
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. 1) VCC =0V 2) High or Low State
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO VO Top dt/dv Supply Voltage Input Voltage Output Voltage (see note 1) Output Voltage (see note 2) Operating Temperature Input Rise and Fall Time (see note 3) (V CC = 5.0 0.5V) Parameter Valu e 4.5 to 5.5 0 to 5.5 0 to 5.5 0 to VCC -40 to +85 0 to 20 Unit V V V V
o
C
ns/V
1) VCC =0V 2) High or Low State 3)VIN from0.8V to 2 V
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74VHCT00A
DC SPECIFICATIONS
Symb ol Parameter T est Cond ition s V CC (V) VIH VIL VOH VOL II ICC ICC High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current Output Leakage Current 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 0 to 5.5 5.5 5.5 I O =-50 A IO=-8 mA I O=50 A IO=8 mA VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND VOUT = 5.5V 4.4 3.94 0.0 0.1 0.36 0.1 2 1.35 4.5
o
Value T A = 25 C Min. 2 0.8 4.4 3.8 0.1 0.44 1.0 20 1.5 Typ . Max. -40 to 85 C Min . 2 0.8 Max.
o
Un it
V V
V V A A mA
IOPD
0
0.5
5.0
A
AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns)
Symb ol Parameter Test Co ndition V CC (*) CL (pF ) (V) 5.0 5.0 15 50 Value T A = 25 o C Min. Typ . 5.0 5.5 Max. 7.0 8.0 Un it -40 to 85 o C Min . 1.0 1.0 Max. 8.0 9.0
tPLH tPHL
Propagation Delay Time
ns
(*) Voltage range is 5V 0.5V
CAPACITIVE CHARACTERISTICS
Symb ol Parameter T est Cond ition s
o
Value T A = 25 C Min. Typ . 4 10.5 Max. 10 -40 to 85 C Min . Max. 10
o
Un it
C IN CPD
Input Capacitance Power Dissipation Capacitance (note 1)
pF pF
1) CPD isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD * VCC *fIN + ICC/4(per Gate)
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74VHCT00A
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol Parameter T est Cond ition s V CC (V) VOLP VOLV VIHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 5.0 -0.8 5.0 5.0 C L = 50 pF 2.0 0.8
o
Value T A = 25 C Min. Typ . 0.4 -0.4 Max. 0.8 -40 to 85 C Min . Max.
o
Un it
V
1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0, (n -1) outputs switching and one output atGND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to3.0V. Inputs under test switching: 3.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz.
TEST CIRCUIT
CL = 15/50 pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
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74VHCT00A
SO-14 MECHANICAL DATA
DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
P013G
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74VHCT00A
TSSOP14 MECHANICAL DATA
mm MIN. A A1 A2 b c D E E1 e K L 0o 0.50 0.05 0.85 0.19 0.09 4.9 6.25 4.3 5 6.4 4.4 0.65 BSC 4o 0.60 8o 0.70 0o 0.020 0.10 0.9 TYP. MAX. 1.1 0.15 0.95 0.30 0.20 5.1 6.5 4.48 0.002 0.335 0.0075 0.0035 0.193 0.246 0.169 0.197 0.252 0.173 0.0256 BSC 4o 0.024 8o 0.028 0.004 0.354 MIN. inch TYP. MAX. 0.433 0.006 0.374 0.0118 0.0079 0.201 0.256 0.176
DIM.
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
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74VHCT00A
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